Sources include "All you ever wanted to know..." by CP Software, John Elliott, Jacob Nevins (and his excellent web pages), Cliff Lawson (who kindly OCRed the original Amstrad documentation), Howard Fisher (who lent me a KeyMouse), Paul Hunt, and Kevin Thacker's CPC resource, which contains Z80 and FDC info relevant to the PCW. Thanks chaps. Further information is always welcome.
Richard Fairhurst, 1996-1997
The BDOS (Basic Disc Operating System) is the actual OS code itself, written by Digital Research. This should largely remain the same for any machine running CP/M.
The BIOS (Basic Input/Output System) provides a set of routines which access the machine's hardware, and was written in the PCW's case by Locomotive/Amstrad. The BIOS routines are called by the BDOS for all screen, disc, and printer operations.
Also relevant is the CCP (Command Console Processor), the front-end which accepts commands typed at the A> prompt. The PCW's implementation of CP/M only loads this on system startup, so it must not be overwritten.
The TPA (Transient Program Area) is the area of memory, starting at &0100 in a 64k address space, where user programs (.COM files) load and run.
|I||FDC status register|
|I/O||FDC data register|
|I||AMX mouse. Vertical movement: b0-3 4-bit up counter, b4-7 down counter.|
|I||AMX mouse. Horizontal movement: b0-3 4-bit right counter, b4-7 left counter.|
|I||AMX mouse. Button states: b2 right, b1 middle, b0 left (0 if pressed, 1 if not).|
|EMR MIDI interface|
|I/O||Fax Link interface (CPS8256-compatible circuitry).|
|Kempston mouse (similar to AMX)|
|I||MasterScan: b0 ink under scan head.|
|I||Cascade/Spectravideo joystick. b4 right, b3 up, b2 left, b1 fire, b0 down.|
|I/O||Serial ports (click for more)|
|O||Select bank for &0000|
|O||Select bank for &4000|
|O||Select bank for &8000|
|O||Select bank for &C000. Usually &87.|
|O||b7-b4: when set, force memory reads to access the same bank as writes for &C000, &0000, &8000, and &4000 respectively|
|O||Address of roller RAM. b7-5: bank (0-7). b4-1: address / 512.|
|O||Vertical screen position|
|O||b7: reverse video. b6: screen enable.|
|O||0 end bootstrap, 1 reboot, 2/3/4 connect FDC to NMI/standard interrupts/neither, 5/6 set/clear FDC terminal count, 7/8 screen on/off (for external video), 9/10 disc motor on/off, 11/12 beep on/off|
|I||b6: 1 line flyback, read twice in succession indicates frame flyback. b5: FDC interrupt. b4: indicates 32-line screen. b3-0: 300Hz interrupt counter: stays at 1111 until reset by |
|Parallel port (PCW9512)|
|I/O||Matrix printer data|
|O||Matrix printer commands|
|I||Matrix printer status. b7 bailbar (0 out), b2 paper found.|
Unlike the CPC, the PCW uses the standard Z80 method of accessing I/O ports. Either the port is stored as a (single-byte) number in C and an instruction like
out (c),a used, or the port is passed as part of the instruction
The PCW's clock speed is 3.4MHz, slowed down from a 4MHz CPU. However, access by the video hardware slows down memory accesses to the first 128k (banks 0-7). The BIOS interrupt is also slow, and should be disabled for time-critical operations where operations such as keyboard scanning and disc access are not required.
The roller RAM and screen memory may be stored in any of banks 0-7. Consequently, video circuitry access requirements slow down any code/data access in these banks.
Any bank can be mapped into any of the four 16k segments of the Z80's address space using ports &F0-&F3. Under CP/M, the following (named) arrangements are standard:
|Screen||BDOS (0)||Extra (n+2)||TPA (1)|
||7 common||7 common||7 common||7 common|
||2 screen||3 BDOS/BIOS||3 BDOS/BIOS||6 TPA|
||1 screen/BIOS||1 screen/BIOS||8+n CCP or M:||5 TPA|
||0 BIOS||0 BIOS||0 BIOS||4 TPA|
Sending the bank number (with b7 set) to one of ports &F0-&F3 selects that bank for reading and writing. Sending the bank number for writing to b0-2 of a port and the bank for reading to b4-b6 (with b7 reset) maps separate banks in for reading and writing: this can only be used for the first 8 banks.
As an example of read/write access, to map bank 5 into memory from &4000, you would use
ld a,&85: out (&F1),a.
Each line is 720, not 90 bytes long. This is because the PCW takes every eighth byte starting at the address pointed to by the roller RAM. In this way, eight screen lines may be interleaved as follows for easy character writing (assuming a consecutive roller RAM arrangement):
(a+0) (a+8) (a+16) ... (a+1) (a+9) (a+17) (a+2) (a+10) (a+18) (a+3) (a+11) (a+19) (a+4) (a+12) (a+20) (a+5) (a+13) (a+21) (a+6) (a+14) (a+22) (a+7) (a+15) (a+23)
The vertical position of the screen on the monitor may be altered by incrementing or decrementing port &F6.
b7: k2 k1 [+] . , space V X Z del< alt b6: k3 k5 1/2 / M N B C lock k. b5: k6 k4 shift ; K J F D A enter b4: k9 k8 k7 ¤ L H G S tab f8 b3: paste copy # P I Y T W Q [-] b2: f2 cut return [ O U R E stop can b1: k0 ptr ] - 9 7 5 3 2 extra b0: f4 exit del> = 0 8 6 4 1 f6 &3FF0 &3FF1 &3FF2 &3FF3 &3FF4 &3FF5 &3FF6 &3FF7 &3FF8 &3FF9 &3FFABytes &3FFB-&3FFF reflect the keyboard in a different, incomplete way. These bytes are also used by Creative Technology's KeyMouse (in its standard "MicroDesign mode") and the Teqniche 102-key keyboard to provide additional functionality, creating some incompatibilities along the way. Among the more interesting mappings are the following:
|b7-b0 unused (0)|
b6-b0 horizontal movement counter.
|KeyMouse||b7-b6 high bits of vertical movement counter.|
|b7 always set; b6 current state of SHIFT LOCK
b3-b0 cursor keys, b4 matrix key
b3-b0 low bits of vertical movement counter.
|KeyMouse||b7 left button, b6 right button.|